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Loïc LAGADEC

Full Professor

IT Department / Circuits & Systems
Lab-STICC laboratory
SHARP : Software and Hardware, ARchitectures and Processes / ARCAD: Hardware ARchitectures and CAD tools

Room/desk number: N107

Office phone no. +33 2 98 34 89 08
Contact by email loic.lagadec@ensta-bretagne.fr

ORCID number: 0000-0003-3778-3144

https://www.ensta-bretagne.fr/lagadec/

Area(s) of expertise
Activities
  • Research projects coordinator
  • PhD advisor
Teaching missions presentation

Programming languages (C, Python, SQL)
Software development methodology
Cyber security basics
System engineering

Research missions presentation

Reconfigurable architectues
CAD tools for reconfigurable computing
Hardware security
Drones fleet resilience

Most recent publications

SoSAF: A Pharo-Based Framework for Enhancing System of Systems Dependencies Analysis

Mouhamadou F Ball, Patrick Auger, Jannik Laval, Loïc Lagadec

2024

Efficient Adaptive Multi-Level Privilege Partitioning With RTrustSoC

Raphaële Milan, Lilian Bossuet, Loïc Lagadec, Carlos Andres Lara-Nino, Brice Colombier, Théotime Bollengier

IEEE Transactions on Circuits and Systems I: Regular Papers, 2024, pp.1-13. ⟨10.1109/TCSI.2024.3413364⟩

Environmental Constraints for Intelligent Internet of Deep-Sea/Underwater Things Relying on Enterprise Architecture Approach

Charbel Geryes Aoun, Noura Mansour, Fadi Dornaika, Loïc Lagadec

Sensors, 2024, 24 (8), pp.2433. ⟨10.3390/s24082433⟩

TrustSoC: Light and Efficient Heterogeneous SoC Architecture, Secure-by-design

Raphaële Milan, Lilian Bossuet, Loïc Lagadec, Carlos Andres Lara-Nino, Brice Colombier

2023 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), Dec 2023, Tianjin, China. pp.1-6, ⟨10.1109/AsianHOST59942.2023.10409311⟩

Gigue: A JIT Code Binary Generator for Hardware Testing

Quentin Ducasse, Pascal Cotret, Loïc Lagadec

VMIL, Oct 2023, Cascais, Portugal. ⟨10.1145/3623507.3623553⟩

All publications